The present invention generally relates to the field of photolithographic patterning. The present invention particularly relates to patterning small dimensions in a semiconductor process.
It is desirable to form smaller geometries or dimensions for semiconductor devices for a number or reasons including to decrease manufacturing costs. A smaller semiconductor device uses less area on a wafer so that additional devices can be formed in the same area of a wafer. More dense features allows for more dense devices, such as increased channel width in MOSFETs which leads to lower on resistance. However, forming these smaller geometries requires better semiconductor manufacturing equipment that can support the smaller geometries. Having to purchase new manufacturing equipment to support the smaller geometries can be very costly.
For example, geometries in today""s semiconductor devices are approaching 0.12 um. Aligning mask layers to pattern geometries or dimensions of this size is a significant challenge. Alignment equipment to meet such device sizes needs to be very accurate and as result is very expensive. Additionally, the wavelength of light or other electromagnetic radiation used to expose a photoresist through patterned mask openings has become increasingly shorter. It is suggested that x-rays, having a shorter wavelength, be used instead of light to expose photoresists. However, X-ray lithographic equipment is very expensive. Thus, it is desirable to manufacture devices having fine geometries by using larger mask dimensions in order to avoid purchasing new manufacturing equipment and provide less expensive processing.
Additionally, by providing finer geometry devices, die size can be reduced in order to reduce manufacturing costs of devices. It is desirable to form more densely packed devices into each square area of an integrated circuit.
The present invention is briefly summarized by the claims that are found below.